TY  - JOUR
A1  - Zeeshan, Ahmed
T1  - Towards Performance Measurement and Metrics Based Analysis of PLA Applications
N2  - This article is about a measurement analysis based approach to help software practitioners in managing the additional level complexities and variabilities in software product line applications. The architecture of the proposed approach i.e. ZAC is designed and implemented to perform preprocessesed source code analysis, calculate traditional and product line metrics and visualize results in two and three dimensional diagrams. Experiments using real time data sets are performed which concluded with the results that the ZAC can be very helpful for the software practitioners in understanding the overall structure and complexity of product line applications. Moreover the obtained results prove strong positive correlation between calculated traditional and product line measures.
KW  - Programmierbare logische Anordnung
KW  - Analysis
KW  - Measurement
KW  - Software product lines
KW  - Variability
Y1  - 2010
U6  - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:bvb:20-opus-68188
ER  - 
TY  - THES
A1  - Wolz, Frank
T1  - Ein generisches Konzept zur Modellierung und Bewertung feldprogrammierbarer Architekturen
T1  - A generic concept for modelling and evaluating field-programmable architectures
N2  - Gegenstand der Arbeit stellt eine erstmalig unternommene, architekturübergreifende Studie über feldprogrammierbare Logikbausteine zur Implementierung synchroner Schaltkreise dar. Zunächst wird ein Modell für allgemeine feldprogrammiebare Architekturen basierend auf periodischen Graphen definiert. Schließlich werden Bewertungsmaße für Architekturen und Schaltkreislayouts angegeben zur Charakterisierung struktureller Eigenschaften hinsichtlich des Verhaltens in Chipflächenverbrauch und Signalverzögerung. Ferner wird ein generisches Layout-Werkzeug entwickelt, das für beliebige Architekturen und Schaltkreise Implementierungen berechnen und bewerten kann. Abschließend werden neun ressourcenminimalistische Architekturen mit Maschen- und mit Inselstruktur einander gegenübergestellt.
N2  - This work presents a first architecture-spreading study on field-programmable logical devices leaving the beaten tracks of commercial architecture improvements. After a formal model for general field-programmable architectures based on periodic graphs has been given, some feasible evaluation metrics for architectures and circuit layouts are defined characterizing structural properties of architectures in respect of chip area usage and performance. Then, a generic layout tool is developped working on arbitrary architecures and circuits. Finally, nine resource minimal mesh- and island-style architectures are compared.
KW  - Gay-Array-Bauelement
KW  - Programmierbare logische Anordnung
KW  - Field programmable gate array
KW  - Feldprogrammierbare Architekturen
KW  - Field-programmable Gate Arrays
KW  - field-programmable architectures
KW  - field-programmable gate arrays
Y1  - 2003
U6  - http://nbn-resolving.de/urn/resolver.pl?urn:nbn:de:bvb:20-opus-7944
ER  -